Computer Architecture and Organisation and Software 1 (ETF AEO DR1 4766) |
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General information |
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Module title | Computer Architecture and Organisation and Software 1 |
Module code | ETF AEO DR1 4766 |
Study | ETF-B |
Department | Control and Electronics |
Year | 1 |
Semester | 1 |
Module type | Mandatory |
ECTS | 6 |
Hours | 66 |
Lectures | 30 |
Exercises | 36 |
Tutorials | 0 |
Module goal - Knowledge and skill to be achieved by students |
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| Students gain knowledge on organisation and architecture of computer systems, starting with standard von Neumann model to modern concepts of computer architecture. By learning principles of computer system design, students will gain knowledge of software organisation and execution at assembly level, and impact of advancements in the area of networking, security, Internet, multimedia, etc. on development of computer architecture and organisation. <br> |
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Syllabus |
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| 1. Assembly level machine organization: basic organization of the von Neumann machine; control unit; instruction fetch, decoding, and execution; instruction sets and types; assembly/machine language programming; instruction formats; addressing modes; subroutine call and return mechanisms; I/O and interrupts. <br> 2. Memory system organization and architecture: storage systems and their technology; coding, data compression, and data integrity; memory hierarchy; main memory organization and operations; latency, cycle time, bandwidth and interleaving; cache; virtual memory; fault handling and reliability. <br> 3. Interfacing and communication: I/O fundamentals: buffering, programmed I/O, interrupt-driven I/O. Interrupt structures: vectored and prioritized. External storage, physical organization and drives. Buses: bus protocols, arbitration, direct-memory access (DMA). Introduction to networks. Multimedia support. RAID architectures. <br> 4. Functional organization: implementation of simple data paths, control unit: hardwired realization vs. microprogrammed realization; instruction pipelining; multiprocessor and alternative architectures; cache coherence; memory models and memory consistency. <br> 5. Performance improvements: RISC architecture; introduction to instruction-level parallelism (ILP); scalability. Examples of modern computer organisation and architecture and trends in developing processor architecture. <br> |
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Literature |
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| Recommended | 1. Lecture notes and slides (will be available at the Web site) <br> 2. William Stallings, Computer Organization and Architecture: Designing for Performance, 7. izdanje, Prentice Hall; 2005. <br> 3. David Patterson, John Hennessy, Computer organization and design, the hardware/software interface, Morgan Kaufmann; 2004. <br> |
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Didactic methods |
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| Lectures. Individual and team work on project assignments in laboratory: by use of knowledge acquired through lectures and modern tools for performance measuring and simulation, students will analyse performances and functionality of information systems. <br> |
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Exams |
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| Through the course, student gains points by following system: <br> 1. Attendance to lectures and laboratory: 10 points; <br> 2. Homework: 10 points; <br> 3. First partial exam: 20 points; <br> 4. Second partial exam: 20 points; <br> 5. Final exam: 40 points. <br> |
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Aditional notes |
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